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		Electronic Design: Motorola
			With Linda's help, a parallel program for characterizing
			large semicustom standard-cell circuits has been implemented by Binay George,
			Sean Tyler, and Markus Wloka at Motorola
			Inc.'s Semiconductor Systems Design Technology Center in Tempe, AZ.
			Called the Entice program (for Energy and timing characterization
			environment), it is run on networked computers to deliver higher
			performance and new functions. 
			 
			Standard cells are circuits that provide specific, pre-defined functionality
			to chip designers. Used as building blocks for more complex microprocessors,
			these cells and the larger circuits built from them must be fully simulated
			with Spice, a linear-circuit simulator, before fabrication. Timing and power
			characteristics--that is, how quickly the circuits can be cycled and how
			many watts are consumed during active and idle modes--are primary concerns
			and must be evaluated for a range of operating temperatures, supply voltages,
			and other criteria. Full analog simulations of large semicustom designs
			are extraordinarily time-consuming jobs. Because simulation time grows more than 
                        linearly with circuit size and component number, each simulation may take tens of 
                        hours or longer to complete on mainframe and minisupercomputer systems. 
			 
			Motorola's Entice package approximates analog methods to deliver much shorter
			solution times and higher throughput on such jobs. Instead of performing
			a sequential simulation of the complete design, Entice performs smaller
			Spice simulations of each design's component parts in parallel over a workstation
			network. The performance of the complete design is then approximated by
			forming sums along those components. The total timing delay, for example,
			is approximately equal to the sum of timing delays along the longest path
			in the overall design. For power, total consumption is approximately equal
			to the sum of the power consumed by all the parts. 
			 
			Entice's distributed-processing feature dramatically reduces characterization
			time for standard-cell libraries. Characterization of eight representative
			cells from the 165-cell Motorola library took more than 127 minutes with
			Entice on one SparcStation II. On a network of 10 such workstations,
			the characterization time was reduced to 15 minutes, a speedup of 8.5 times. 
			 
			Motorola also employs the computational potential of networks to enhance
			functionality in simulations of very large-scale integrated (VLSI) circuits.
			Unlike previous characterization systems, Entice incorporates automated
			file handling facilities and is not limited to specific methodologies. 
			 
			Standard-cell timing delay and power dissipation, for example, depend on
			input rise and fall time, fanout capacitive load, temperature, and voltage
			supply. Entice allows the user to define parameters for all four variables and vary
			them over ranges of values. According to user preferences, the data obtained
			may be stored in tabular, piece-wise linear, or polynomial form. These and
			other features, made practical through the aggregate power of networked
			systems, make Entice flexible and highly interactive.  
		 
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